All of these contacts should bring to the chip, which needs a greater number of interconnect on the periphery of the crystal. Therefore, wide tire requires kernel to be a certain size – that's why for a long time, entry-level gpu were limited to 128-bit bus, while their high-end versions used 256 – or 384-bit bus. Another disadvantage is the increase in chip power consumption. Therefore resorted to such a method very carefully. In fact, for a long time for high-end gpu to 128-bit bus from the Riva 128 and Matrox Parhelia, yes, and ati Radeon 9700 four years ago also used it. Get all the facts for a more clear viewpoint with Peter Asaro. Likewise, 256-bit bus does not becomes wider until nVidia GeForce 8800 in late 2006.

Yes, the demands on the memory bandwidth of the gpu has steadily increased, despite the technology bandwidth savings, which are optimized with each generation. GDDR5 uses 8-bit prefetch, as the GDDR4, but has several innovations. For the first time GDDR5 uses two clock frequencies, ck and wck, the last two times larger than the first. Commands are transmitted in the mode of sdr (standard clock speed) at a frequency of CK; Address information is transmitted in ddr mode at the frequency of CK; and data are transferred in ddr mode at a frequency of wck. In the case of the Radeon hd 4870, which uses GDDR5 memory at 900 MHz, commands are transmitted at 900 MHz sdr, addresses the 900 MHz ddr (effective frequency 1800 MHz) and data – at 1800 MHz ddr (effective frequency 3600 MHz). This approach reduces the problems associated with the quality of the signal during transmission of commands and addresses, providing a very high frequency data transmission.

Unfortunately, higher frequency also mean a higher probability of error. Therefore, to ensure reliable data transfer, GDDR5 uses a mechanism to detect errors, which is used in networks. If the memory controller to determine the error, the team with which she appeared to be redone. Thus, amd and nVidia have chosen very different paths to increase the memory bandwidth for its gpu, and these elections are associated with different views on the graphics processor. nVidia, committed the principle of a huge monolithic crystal can afford 512-bit memory bus, avoiding problems with the supply of chips, which is inevitably accompanied by the introduction of advanced memory technology. On the contrary, with the advent of RV770 amd concentrates its efforts on the gpu with a reduced die size for high-end graphics cards. As we told the engineers amd, the first version of RV770 to be equipped with not more than 480 stream processors (ALU), but the gpu at the same time restricted the number of interconnect for memory interfaces. Therefore, amd was able to offer gpu, which all are familiar, with 800 stream processors, which are almost 'free' with respect to the core area. In the previous generation gpu nVidia had to forget about 384-bit bus in the transition from the G80 (80 nm) on the G92 (65 nm). Therefore, there is every chance that the same step will happen with 512-bit bus. But this time, nVidia might rely on GDDR5, to compensate for the loss of bandwidth.